Logic testing and design for testability

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Logic testing and design for testability

Hideo Fujiwara

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카테고리:

년:

1985

출판사:

MIT Press

언어:

english

페이지:

293

ISBN 10:

0262060965

ISBN 13:

9780262060967

시리즈:

MIT Press series in computer systems

파일:

PDF, 63.92 MB

IPFS:

,

english, 1985

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M. Bushnell, V. Agrawal — Essentials of Electronic Testing - For Digital, Memory and Mixed-Signal VLSI Circuits

Jose L. Huertas — Test and Design-for-Testability in Mixed-Signal Integrated Circuits

Charles E. Stroud (auth.) — A Designer’s Guide to Built-In Self-Test

INTEGRA — Digital system design with VHDL

M. L. Bushnell and V. D. Agrawal — Solutions to Problems from Essentials of Electronic Testing

SRINIVAS, SRINIVAS DEVADAS ABHIJIT GHOSH KURT KEUTZER, Pdg2Pic — LOGIC SYNTHESIS

Frank F. Tsui — Lsi/Vlsi Testability Design

Laung-Terng Wang, Cheng-Wen Wu, Xiaoqing Wen — VLSI Test Principles and Architectures: Design for Testability (Systems on Silicon)

Francis C. Wang — Digital Circuit Testing: A Guide to DFT and Other Techniques

Mark Zwolinski — Digital System Design with VHDL, 2nd Edition

Mark Zwolinski — Digital System Design with Systemverilog (Paperback) (Prentice Hall PTR Signal Integrity Library)

Zwoliński, Mark — Digital system design with SystemVerilog

Colin Maunder — The Board Designer's Guide to Testable Logic Circuits (Electronic Systems Engineering Series)

Hideo Fujiwara — Logic testing and design for testability

Katarzyna Radecka, Zeljko Zilic — Verification by Error Modeling: Using Testing Techniques in Hardware Verification (Frontiers in Electronic Testing)

written by Katarzyna Radecka, Zeljko Zilic. — Emerging Nanotechnologies -Test Defect Tolerance and Reliability -SP

Mohammad Tehranipoor — Emerging Nanotechnologies: Test, Defect Tolerance, and Reliability (Frontiers in Electronic Testing) (Frontiers in Electronic Testing)

John G. Webster (Editor) — 13.Computer-Aided Design of Integrated Circuits

Alexander Miczo — Digital Logic Testing and Simulation

Frederick J. Hill, Gerald R. Peterson — Computer Aided Logical Design with Emphasis on VLSI

N. K. Jha, S. Gupta — Testing of Digital Systems

J B Gosling — Simulation in the design of digital electronic systems

John B. Gosling — Simulation in the Design of Digital Electronic Systems

Francisco Azevedo — Constraint Solving Over Multi-valued Logics: Application to Digital Circuits

Miron Abramovici, Melvin A. Breuer, Arthur D. Friedman — Digital Systems Testing & Testable Design

M. Bushnell; Vishwani Agrawal — Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits

M. Bushnell, Vishwani Agrawal — Essentials of Electronic Testing for Digital, Memory, and Mixed-Signal VLSI Circuits

Kwang-Ting (Tim) Cheng, Vishwani D. Agrawal — Unified Methods for VLSI Simulation and Test Generation

Hurst, Stanley Leonard — VLSI testing : digital and mixed analogue/digital techniques

George W. Zobrist — VLSI Fault Modeling and Testing Techniques:

Vasant B. Rao, David V. Overhauser, Timothy N. Trick, Ibrahim N. Hajj — Switch-Level Timing Simulation of MOS VLSI Circuits

Charles E. Stroud — A Designer s Guide to Built-in Self-Test

Katarzyna Radecka, Zeljko Zilic — Verification by Error Modeling: Using Testing Techniques in Hardware Verification

Michael Goessel, Vitaly Ocheretny, Egor Sogomonyan, Daniel Marienfeld — New Methods of Concurrent Checking (Frontiers in Electronic Testing)

Zainalabedin Navabi (auth.) — Digital System Test and Testable Design: Using HDL Models and Architectures

F. Lombardi, M.G. Sami — Testing and Diagnosis of VLSI and ULSI

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